At a glance
- Studying Software Engineering, Computer Science or any technical study with focus on software engineering
- Willingness and experience working with C# and WPF
- Knowledge in other programming languages (like C/C++, JavaScript, Perl, Python, ...)
- Good English skills
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At a glance
- Work in the R&D mixed-signal IC design organization
- Support R&D chip designers for daily issues related to mixed-signal IC development flow and related EDA software tools and methodology (1st level support)
- Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology
- Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed
- Trigger and track implementation of enhancements of the design environment to ensure on-time availability for productive usage
- Work closely with internal software tool and methodology providers on improving and developing new solutions
- Promote new methodology solutions and support the roll-out of these in design projects
- Share knowledge within the (IFX world-wide) “Design Application Engineering Community”
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At a glance
- Perform top-level verification of mixed-signal IP modules or subsystems
- Focus on converter, clocking, high speed interfaces and power management
- Participate to innovation projects in the field of AI/Machine Learning with focus on automation of the mixed-signal verification working flow
- Work close with design and concept in order to achieve very high quality deliveries
- Constantly align with digital and post silicon counterparts to achieve highest synergies in targets, implementation and methods
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At a glance
- Be responsible for planning, execution and coordination of pre-silicon verification according to ISO26262
- Coordinate and give technical guidance to team members and consultants
- Work together with concept-, design- and verification teams to ensurethat AURIX™ will continue its success story
- Identify, analyze and eliminate design bugs
- Contribute to the development of cutting-edge verification methodology
- Ramp up fellow engineers with your technical expertise
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Your future responsibilities
- Educational Background:
- PhD in digital IC design with at least 3 years of relevant experience, or
- MSc in a relevant field with at least 5 years of relevant experience.
- Technical Expertise:
- Demonstrate strong proficiency in HDLs (SystemVerilog, VHDL).
- Excel in architecture exploration and micro-architecture development.
- Possess in-depth knowledge of on-chip infrastructure (AMBA/PCIe/USB/JTAG, NoC).
- Have a solid background in silicon development and digital IP design/integration.
- Utilize experience with back-end tools (synthesis and Place & Route).
- Exhibit proficiency in Static Timing Analysis tools and Clock Domain Crossing.
- Show expertise in functional and formal verification.
- Apply skills in scripting languages (Tcl, Python, Perl, MATLAB, Shell-scripting).
- Leverage experience with EDA tools (simulator/debug/synthesis/timing analysis/place & route) from major vendors (Synopsys, Cadence, Mentor).
- Experience with FPGA tools (e.g., Xilinx)
- Communicate effectively in verbal and written English; knowledge of German is an advantage.
- Software development skills (bare metal, RISC-V/ARM) are beneficial.
- Additional Skills:
- Proven project management experience.
- Autonomous, well-organized, and thrive in a dynamic and multicultural team environment.
- Experience in team leadership or PhD supervision is highly desirable.
- Effective in strategy development is an advantage.
- Strong track record in business development and winning projects.
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At a glance
- Work in the R&D mixed-signal IP design organization
- Support R&D chip designers for daily issues related to mixed-signal IP development flow and related EDA software tools and methodology (1st level support)
- Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology
- Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed
- Trigger and track implementation of enhancements of the design environment to ensure on-time availability for productive
- usage
- Work closely with internal software tool and methodology providers on improving and developing new solutions
- Promote new methodology solutions and support the roll-out of these indesign projects
- Share knowledge within the (IFX world-wide) "Design Application Engineering Community"
|
At a glance
- Work in the R&D mixed-signal IC design organization
- Support R&D chip designers for daily issues related to mixed-signal IC development flow and related EDA software tools and methodology (1stlevel support)
- Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology
- Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed
- Trigger and track implementation of enhancements of the design environment to ensure on-time availability for productive usage
- Work closely with internal software tool and methodology providers on improving and developing new solutions
- Promote new methodology solutions and support the roll-out of these in design projects
- Share knowledge within the (IFX world-wide) “Design Application Engineering Community
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At a glance
- End-to-End Digital Circuit Design & Verification
Lead the entire RTL design process, from block-level to top-level, ensuring robust logic synthesis, static timing analysis, and seamless integration across clock domains - Defining Architecture & Hardware Requirements
Translate product requirements into hardware specifications, working with system concept engineers to define optimal architectures and interfaces for digital modules - Technical Leadership & Team Management
Plan and execute digital design activities, oversee quality inspections, provide post-silicon bring-up support, and mentor a growing team of designers and students - DFT & Functional Safety Compliance
Lead design-for-test (DFT) efforts, including scan insertion and ATPG, while ensuring compliance with ATV ISO 26262 standards for functional safety - Collaborate with System, Verification & Chip Integration Teams
Work closely with cross-functional teams to define hardware architectures, review verification plans, and develop test cases that achieve high coverage - Pre-Silicon Verification & Quality Assurance
Analyze clock domain crossings (CDC) and linting, review pre-silicon verification plans, and ensure designs meet rigorous quality and testing standards
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